In an aspect of packaging technologies, redistribution layers (RDLs) may be formed over a chip and electrically connected to active devices in the chip. Input/output (I/O) connectors such as solder balls on under-bump metallurgy (UBMs) may then be formed to electrically connect to the chip through the RDLs. An advantageous feature of this packaging technology is the possibility of forming fan-out packages. Thus, the I/O pads on the chip can be redistributed to cover a greater area than the chip, and hence the number of I/O pads packed on the surfaces of the packaged chips can be increased.
Integrated Fan Out (InFO) package technology is becoming increasingly popular, particularly when combined with Wafer Level Packaging (WLP) technology. Such resulting package structures provide for high functional density with relatively low cost and high performance packages.